One way to read this article is as a call for a chip slicing method for the masses.
It would seem quite a tractable problem for a keen hobbyist. Build a robot, something like a 3D printer in reverse, to alternately remove thin layers from a chip and image the newly exposed layer, until the chip is gone. Use a program to assemble the images into a 3D representation and extract the circuit.
In fact, such a project would be a relatively simple way to start gaining the knowledge required for the reverse process, of building a chip.
That actually sounds, for a change, like something that would benefit from centralization: I would imagine instead a mail-order service (like 23andme) where you could drop a chip in a tube and get a 3D model + estimated VHDL emailed to you.
It's not quite that consumer friendly, but there are companies that provide a service like this [1]. I gather it is not cheap. Does anyone know what the rough cost is?
The 3dbrew guys are looking for $2300USD (I think) to have some chips inside the Nintendo 3DS decapped.
Byuu published some wonderful articles (including some figures) on having the SNES coprocessors decapped so they could be successfully emulated for the first time in over a decade.
I looked into reverse engineering of silicon recently, so here are some resources drawn from my comments in a thread about Linux and Intel's PRNG:
* Degate, a somewhat automated "aid in reverse engineering of digital logic in integrated circuits" - http://www.degate.org/
* Silicon Zoo offers a tutorial / background info on this - http://siliconzoo.org/tutorial.html - and it mentions that Pentium I-era chips were "easily viewable" [1], probably with optical microscopes.
Excuse my inexperienced query, but wouldn't a high resolution MRI-esque device be much better for that task? It seems that physical deconstruction of something as intricate as an IC would be fraught with peril. I know there was a similar technique used on a frozen brain to obtain 1mm(?) slices, and I'm sure that's good for biology but my mental model of an IC is that the interesting and encased materials differ more sharply than in biology.
I'd guess MRI would lack the necessary spatial resolution, as the wavelength of the emitted radio waves would be larger than the typical feature size on a chip. For that matter, optical imaging might not be up to it either.
The physical deconstruction would be fraught with peril for the chip, which would end up as powder! I'm not sure what the best technique would be. Maybe a grinding wheel, if it could be controlled well enough? Maybe a flat plate with abrasive paste, or a diamond coated nail file? That would probably be easy to control, albeit time consuming. Laser ablation? Heat the chip to slowly and continuously evaporate it, whilst videoing the evaporation process?
One would have to conduct an experiment to see whether it is best to slice the packaged IC, or remove the encapsulation first. The encapsulation can be removed with nitric acid and acetone, or even a blast with a hot flame [1]. I'd guess it would be worth removing the encapsulation.
If I had to pick a technique from above, I'd first try removing the encapsulation then using a diamond coated nail file.
Former IC failure analyst here. This sort of stuff is possible, absolutely. But it gets exponentially harder as chip geometries get smaller.
Getting through the package to the chip's top surface isn't too bad, because you can play rough with it until you get pretty close to the chip itself. So you have all sorts of fun options: wet chemistry, laser ablation, and physical milling being most common. Once you get up all in the chip's personal space, wet chemistry is probably the way to go, though nitric acid will wreak havoc on any copper elements, potentially including bond wires if they're not gold. Alternately, you can go at it with a specialized plasma tool.
Delayering the chip is time-consuming, but not prohibitively so. Your choice of wet chemistry, plasma toolsets, and physical grinding on a wheel (which works _shockingly_ well for what feels like a stone-age process). It can take a lot of practice to do this cleanly so you don't penetrate and damage a lower layer while working on an upper one, but it can be done.
The nasty bit, from the point of view of doing this outside a major megacorp, is probing and analyzing smaller geometries. As things get smaller, they get a lot more delicate. You can't just scratch through the insulative layer above metal lines with a big needle anymore, because the tip of that needle is significantly larger than multiple metal lines under it. Laser ablation can still work for mid-sized geometries, but with modern digital ICs it's all about focused ion beam tooling. That's a high-vacuum device that slowly and precisely mills and/or deposits metal with...well, an ion beam. You can get down way below the visible light range in terms of size and precision. Really cool stuff, but good luck finding one for under seven figures!
Once that's done, if your geometry is large enough to use an optical microscope, probe needles range in price from a few bucks a pop to well into the multi-hundred range. If it's too small, the next option is to get a scanning electron microscope with built-in microprobes. That's...not exactly hobbyist budget.
Doing this for an entire modern CPU-scale IC (instead of focusing on a target block) would take ages and ages and ages. I don't even want to think about it for too long. Months, at the least.
Like I said, possible...but expensive (both in engineer and tool time), hard, and time consuming. The thing is, it's time consuming because the bulk of the work of decapsulating, probing, deprocessing, and analyzing the ICs is done manually and iteratively. A TON of it could potentially be automated, but the motivation to automate all this has traditionally been pretty low because the tooling itself is so expensive that it's low-volume work.
It would seem quite a tractable problem for a keen hobbyist. Build a robot, something like a 3D printer in reverse, to alternately remove thin layers from a chip and image the newly exposed layer, until the chip is gone. Use a program to assemble the images into a 3D representation and extract the circuit.
In fact, such a project would be a relatively simple way to start gaining the knowledge required for the reverse process, of building a chip.