I used VHDL for a semester back in 98 or 99 for my ECE degree. I remember it being extraordinarily brittle compared to something like C, because there were so many ways to trigger unreliability with the wrong clock edges etc. So for example we did almost everything as state machines instead of math. The code was basically unmaintainable by today's standards but was an important learning tool. As I recall, we wrote a VGA signal generator, and if you had less than half a dozen incorrect pixels onscreen, you were doing pretty well. So in fairness, I USED to know this stuff in nauseating detail.

Yes, this is because VHDL is not code. It's a different paradigm entirely. The FPGA doesn't "run" the VHDL, etc.

The units in an FPGA are just a little bit of logic with a bunch of connectivity to local busses.

I haven't done much VHDL lately (ECE '96 here) but I do remember how the stuff works. But then again I focused mainly on CPU architecture.